1. Field of the Invention
The present invention is related to a capacitive sensing circuit and, more particularly, to a capacitive feedback amplifier with a floating-node charge programming circuit for sensing capacitance change of a capacitive sensor.
2. Description of Related Art
In the design of Microsystems, it is frequently desirable to utilize sensors to transduce some information into electrical signals which can be processed by the circuit. Such sensors sense various types of signals and may be used for capturing information such as temperature, pressure, voltage, capacitance, resistance, or the like. For example, the sensor may be a MEMS sensor, a CMUT (capacitive micro-machined ultrasonic transducer), a temperature sensor, or the like.
The signal that a sensor senses may require amplification for proper interaction with processing circuitry. Consequently, a sensor may typically be coupled to an amplifier. This may be implemented using a two chip hybrid approach. When connecting a sensor to an amplifier, there is usually a large parasitic capacitance at the connection. This parasitic capacitance may be shunted to ground.
Typically, a capacitive sensor represents sensed changes by outputting a variable capacitance. This change in capacitance is typically small. Thus, it may be significantly affected by the parasitic capacitance.
The connection between the sensor and the amplifier may be referred to as a connecting node. Charges may be trapped inside or may hop through a leaky medium of the sensor. Further, the charges may leak out from bonding sites and form undesired leakage currents. Therefore, the charge on the connecting node is unpredictable. Sensing the minute capacitor variation, dealing with the large parasitic capacitance and leakage currents, and providing the output signal with large dynamic range makes the interface circuit design a challenge. It is even more difficult if low power consumption is desired.
FIG. 1A is a schematic diagram illustrating a conventional approach to capacitive sensing using a lock-in scheme. A high frequency signal 172 is coupled to a first terminal of the capacitive sensor 174 (depicted as MEMS Sensor). The high frequency signal 172 modulates the capacitance change of the capacitive sensor 174 into high frequency band. A second terminal of the capacitive circuit 174 is connected to an inverting input 176i of an amplifier 176. A parasitic capacitor 178 may be connected to the inverting input 176i of the amplifier 176, and to ground 180. The non-inverting input 176n of the amplifier 176 can be connected to ground 180. The output 176o of the amplifier 176 can be demodulated by a demodulator 182. The demodulator 182 is also connected to the high frequency signal 172. The output 182o of the demodulator is coupled to a low-pass filter 184, which outputs an output voltage Vout 186.
A capacitance change signal is modulated to the high frequency band by applying a high frequency signal 172 at the first terminal of the capacitive sensor 174. This modulated high frequency signal is then amplified by the amplifier 176, and demodulated by the demodulator 182 back to a low frequency band. The low-pass filter 184 removes other high frequency harmonics. The output voltage Vout 186 is proportional to the sensing capacitance 174, i.e., Vout ∝Csensor. This approach consumes lots of power, usually in the range of milli-Watts (mW), and the circuits are typically be complicated and consume a large area.
Another common approach to detecting capacitive change is the switched-capacitor circuit having a capacitive feedback charge amplifier. FIG. 1B is a schematic diagram illustrating a capacitive feedback charge amplifier circuit. The circuit 100 is fed by an input voltage Vin 105 through a capacitor C1 110. The capacitor C1 110 bridges the input voltage Vin 105 to a inverting input 115i of an amplifier 115. The amplifier 115 has a feedback capacitor C2 120 connecting the output voltage Vout 135 of the amplifier 115 to the inverting input 115i. The feedback capacitor C2 120 may establish the gain of the circuit 100. The non-inverting input 115n of the amplifier 115 is connected to ground 125, preferably AC ground. The floating node 130 is connected to the inverting input 115i of the amplifier 115, and contains a certain uncontrollable charge Q.
A closed loop gain for the charge amplifier 110 may be expressed as −C1/C2. The output 135 of the amplifier 105 may also have a voltage term determined by a charge Q stored at the inverting input 115i, which may be expressed as VQ=Q/C1. Conventionally, floating-node designs were avoided, because the charge Q on the isolated node is neither predictable nor controllable.
The capacitive feedback amplifier of FIG. 1B can be used to sense capacitance change. To control normally uncontrollable charges, switches may be implemented in the circuit, as is illustrated in FIG. 1C.
FIG. 1C is a schematic diagram illustrating a capacitive feedback charge amplifier with switches for controlling charges in the circuit. A first switch 142 may be implemented, having a first terminal fed by a bias voltage 144, and a second terminal coupled to a capacitive sensor 146 (shown as the MEMS Sensor). A second switch 148 can be implemented; the second switch 148 may have a first terminal coupled to the capacitive sensor 146 and a second terminal to ground 158. The capacitive sensor 146 can be connected to an inverting input 150i of the amplifier 150.
A feedback capacitor Cf 152 can connect the output 150o of the amplifier 150 to the inverting input 150i of the amplifier 150. A third switch 154 may be in parallel with the feedback capacitor Cf 152, whereby the third switch 154 connects the inverting input 150i of the amplifier 150 to the output 150o of the amplifier 150. The inverting input 150i of the amplifier 150 may also be connected to a parasitic capacitor Cw 156, which is also tied to ground 158. The non-inverting input 150n may be connected to ground 158. The output 150o of the amplifier 150 may have a load capacitor CL 160 attached.
A charge on a floating connecting node 162 may be reset in the φ1 phase. The charge on the capacitive sensor 146 may be sensed and amplified in the φ2 phase. The averaged output voltage will be
            V      out        =                  V        bias            ⁢                        C          sensor                          C          f                    ⁢      D        ,where D is the duty cycle of the clocks. In this approach, the charge-sharing and clock feed-through perturbations resulting from the switches degrade the circuit performance. Additionally, the high frequency clocks also make this design more complicated than desired, and consume more power. Moreover, the use of switches causes the design to take up more space than desired.
Both designs, i.e., the lock-in (from FIG. 1A) and switched-capacitor (from FIG. 1C), do not have a wide dynamic range because their output voltages are proportional to the whole sensor capacitance instead of the minute capacitance change. Additionally, both designs are prone to the effect of the parasitic capacitance from the connecting node to the ground. It would be desirable to minimize the parasitic capacitance in both designs.
What is needed, therefore, is a capacitive sensing circuit design to sense minute capacitance change in the presence of a large parasitic capacitance. Indeed, a circuit design that is needed should avoid performance degradation from the charge sharing, and clock feed-through problems to provide high output dynamic range and high signal-to-noise ratio while consuming minimal power. It is to such a device, method, and system that the present invention is primarily directed.